Milwaukee Electronics’ San Diego PCB Design Division likes to help its customers minimize design spins wherever possible. One way to take at least one spin out of the mix is to ensure the most common errors are addressed prior to PCB layout. Here are five of the most common errors and ways to avoid them.

#1 – Netlist errors

Every customer/engineer tends to have their own ways of compiling data within a schematic. Small mistakes can keep that schematic from netlisting properly into the CAD layout tool. Consistent and proper PCB footprints are critical for accuracy and manufacturability. Ensuring consistent PCB footprint naming conventions are utilized and correlated to their schematic symbols as the schematic is developed will save time and money in the design cycle. If components are using inaccurate names or data is inconsistent in the bill of materials (BOM), then mistakes are likely to occur. When the team at SD PCB Design develops proper libraries, it correlates the manufacturer part numbers in the BOM to a datasheet, and with the datasheet verifies that the correct land pattern is modeled. If names do not match between the engineer and the designer’s CAD library, it can create a lot of redundant work. When fine grids are used in schematic design sometimes pins aren’t connected to wires. It may appear the connection is being made, but in reality the end of the pin is overlapping the wire. This is another issue that will not be caught in layout until after placement, which again, can cause redundant work to be done. While working on a complex schematic, it is easy to make a mistake or leave something out. Broken netlists are a very common issue. Usually the errors are small, but sometimes SD PCB Design’s team runs into glaring issues with a customer’s file. In fact, recently a customer submitted a netlist without any pin numbers! A simple way to check for errors before a netlist is submitted for layout is to export it. If that generates a syntax or other error message from the program, there is a problem. In some cases, the error message will be specific enough to identify where the issues are located. In addition to error checking with an export, most schematic capture programs come with at least one verification utility that can be used to identify issues. Utilizing these quick steps will help ensure the netlist is correct and ready for production.

#2 – Deciding on a PCB fabrication vendor and/or assembly house late in the game

Engineers and designers are sometimes so focused on getting their designs started and completed that they often overlook the obvious: who is going to build the boards? Every fabricator has different materials in stock and different processes that they employ. Some engineers try to design a board based on material specifications alone, and then later find out that a fabricator doesn’t carry that material and there may be significant lead times. Or, a design may require special drilling techniques that the selected fabricator isn’t capable of. If those drilling processes must be outsourced, it increases the time and complexity of the fabrication. Selecting the fabricator early helps identify those constraints and potential options for addressing them. Similar issues exist with contract manufacturer selection. While SD PCB Design utilizes IPC design rules and widely industry-accepted practices in layout, there can be contract manufacturer specific equipment constraints or other manufacturability considerations that must be addressed during layout. The team at SD PCB Design already has Milwaukee Electronics’ guidelines inhouse, so if this is the designated contract manufacturer, the layout will be optimized for their requirements.

#3 – Mechanical packaging issues

Almost every PCB needs to interface with the outside world in some way or another, or interface with other PCBs within the internal structure. This means that power and I/O connectors are very common and these requirements are often overlooked. Save time and money on the overall design cycle by ensuring that the gender, pin-out, mating, orientation and location in regard to the housing or board edge have all been carefully thought out. Identify pin 1 locations and provide specific coordinates to ensure that the PCB designers can easily set up the mechanical accurately the first time. If there are multiple connectors of the same type, make sure to communicate the specific reference designators for each connector based on the schematic.

#4 – Failure to define “keep out” zones

It is vital to clearly define any “keep out” zones intended for aspects such as mounting holes or sensitive circuitry. Failing to properly design and define keep out zones will lead to major issues such as creating a shock hazard on the board, causing electromagnetic interference (EMI) or winding up with an un-mountable part. While defining those zones, it is important to remember that solder mask isn’t considered a reliable insulator, consequently, there must be proper distance between copper and any mounting hardware.

#5 – Stack-up failures

Another reason to pick a PCB fabricator early, is to ensure all stack-up considerations are addressed. This is especially important if current or impedance requirements are needed so that the design can be tailored specifically for that manufacturer from the beginning. Differential trace spacing or copper weights on power planes should also be determined as early as possible. In building the stack-up, the fabricator and designer will need to build up enough ground to address EMI issues. The return path and any impedance mismatch should be fully addressed to prevent noise in the product. Decreasing rise-times on chips is a primary cause of stack-up failure. The fabrication vendor should verify the stackup will work prior to routing. If that isn’t done until after routing, it can result in another spin. Eliminating these common errors before sending the design to layout saves time and money. SD PCB Design’s team regularly works with its engineering customers to ensure the design packages coming in will translate to a Rev 1 that works.