A developer of space flight printed circuit board assemblies (PCBAs) which were Class 3/A products and had to meet NASA requirements, had a circuit packaging challenge. Class 3/A PCBAs must have designed feature sizes that meet defined manufacturing processes. The circuit density created power distribution challenges. The operating environment also created thermal challenges. Several layout firms had attempted to develop a packaging solution that solved the packaging challenges using smaller feature sizes. This compromised the Class 3/A manufacturability requirements.
The design team at San Diego PCB as IPC CID+ designers understand correct-by-construction parameters with Class 3/A requirements and immediately established a solution that meets manufacturing, performance and solved this dense layout.
The team was able to design the PCBA layout in compliance with the Class 3/A manufacturability requirements. They guaranteed electrical integrity by ensuring an uninterrupted ground path to every signal and power rail. To aid in power integrity and enhance power delivery, a space-approved DuPont buried capacitance layer was added high in the stackup. This was verified by means of Hyperlynx simulation. The final product was approved and is working in space today.